1. Technical Field
The present invention relates to an electronic device and its manufacturing method, an electro-optical device and its manufacturing method, and electronic apparatus and its manufacturing method.
2. Related Art
In recent years, miniaturization and densification of the packaging of semiconductor devices itself are being demanded with the miniaturization and higher functionality of electronic devices. One such example that is well known is the technology for integrating resistance in semiconductor element using polysilicon. For instance, the technology for forming resistance using polycrystalline grain boundary doped with impurities in polysilicon has been disclosed in Japanese Unexamined Patent Application, First Publication No. S58-7848. Also, the technology for forming a resistance part by applying and curing resistance paste by the thick film formation method in a rearranged wiring section on a semiconductor element, has been disclosed in Japanese Unexamined Patent Application, First Publication No. 2003-46026.
When performing impedance control and the like using passive elements such as resistances installed on a substrate, the resistance value has to be controlled accurately. However, it is difficult to ensure the required accuracy in the art mentioned above, and resistance parts with high reliability cannot be obtained. Moreover, an independent process is necessary to form a resistance part, and the problem in the art mentioned above is that productivity decreases.
To resolve such a problem, the formation of resistance elements using a part of wiring patterns installed on substrates, such as rearranged wiring patterns, may be considered. In this case, wiring can be manufactured using mask, but if the mask alignment accuracy with respect to the substrate is poor, the offset between the mask opening and wiring pattern increases, and the resistance elements formed corresponding to the opening cannot be obtained in the specified area.